dcr1020n52 phase control thyristor ds5964 - 2 april 2012 (ln 29439 ) 1 / 11 www.dynexsemi.com features ? double side cooling ? high surge capability applications ? medium voltage soft starts ? high voltage power supplies ? static switches voltage ratings part and ordering numbe r repetitive peak voltages v drm and v rrm v conditions dcr1020n5 2 * dcr1020n5 0 5 2 00 40 00 t vj = - 40c to 125c, i drm = i rrm = 1 00ma, v drm , v rrm t p = 10ms, v dsm & v rsm = v drm & v rrm + 100v respectively lower voltage grades available. *5000v @ - 40 o c, 5200v @ 0 o c ordering information when ordering, select the required part number shown in the voltage ratings selection table. for example: dcr1020n5 2 note: please use the complete part number when ordering and quote this number in any future correspo ndence relating to your order. key parameters v drm 5 2 00v i t(av) 1018 a i tsm 14 8 00a dv/dt* 1500v/s di/dt 8 00a/s * higher dv/dt selections available outline type code: n (see package details for further information) fig. 1 package outline
semiconductor dcr1020n52 2 / 11 w ww.dynexsemi.com current ratings t case = 60c unless stated otherwise symbol parameter test conditions max. units double side cooled i t(av) mean on - state current half wave resistive load 1 018 a i t(rms) rms value - 1 599 a i t continuous (direct) on - state current - 1 487 a surge ratings symbol parameter test conditions max. units i tsm surge (non - repetitive) on - state current 10ms half sine, t case = 125c 14 .8 ka i 2 t i 2 t for fusing v r = 0 1. 097 ma 2 s thermal and mechanical ratings symbol parameter test conditions min. max. units r th(j - c) thermal resistance C junction to case double side cooled dc - 0.0221 c/w single side cooled anode dc - 0.041 c/w cathode dc - 0.0516 c/w r th(c - h) thermal resistance C case to heatsink clamping force 23 kn double side - 0.004 c/w (with mounting compound) single side - 0.008 c/w t vj virtual junction temperature blocking v drm / vrrm - 125 c t stg storage temperature range - 55 125 c f m clamping force 20.0 25.0 kn
semiconductor dcr1020n52 3 / 11 www.dynexsemi.com dynamic characteristics symbol parameter test conditions min. max. units i rrm /i drm peak reverse and off - state current at v rrm /v drm , t case = 12 5c - 1 00 ma dv/dt max. linear rate of rise of off - state voltage to 67% v drm , t j = 125c, gate open - 1500 v/s di/dt rate of rise of on - state current from 67% v drm to 2x i t(av) repetitive 50hz - 20 0 a/s gate source 30v, 10 ? , non - repetitive - 8 00 a/s t r < 0.5s, t j = 125c v t(to) threshold voltage C low level 300a to 750a at t case = 125c - 0.948 v threshold voltage C high level 750a to 4000a at t case = 125c - 1.078 v r t on - state slope resistance C low level 300a to 750a at t case = 125c - 0.783 m ? on - state slope resistance C high level 750a to 4000a at t case = 125c - 0. 610 m ? t gd delay time v d = 67% v drm , gate source 30v, 10 ? - 3 s t r = 0.5s, t j = 25c t q turn - off time t j = 125c,i peak = 1000a, t p = 10 00us, v rm = 100v, di/dt = - 5a/s, 10 00 s dv dr /dt = 20v/s linear to 20 00v i rr reverse recovery current i t = 1000a, t p = 1000us,t j = 125c, di/dt = - 5a/s, v r = 100v 90 115 a q s stored charge 2200 3800 c i l latching current t j = 25 c, v d = 5v - 3 a i h holding current t j = 25c, r g - k = ? , i tm = 500a, i t = 5a - 300 ma
semiconductor dcr1020n52 4 / 11 w ww.dynexsemi.com gate trigger characteristics and ratings symbol parameter test conditions max. units v gt gate trigger voltage v drm = 5v, t ca se = 25c 1.5 v v gd gate non - trigger voltage at 50% v drm, t case = 125c 0.4 v i gt gate trigger current v drm = 5v, t case = 25c 3 50 ma i gd gate non - trigger current at 50% v drm, t case = 125c 15 ma curves fig.2 maximum & minimum on - state characteristics v tm equation where a = - 0.069834 b = 0.220863 v tm = a + bln (i t ) + c.i t +d. ? i t c = 0.000638 d = - 0.013352 these values are valid for t j = 125c for i t 300a to 4000a 0 500 1000 1500 2000 2500 3000 3500 4000 4500 0.5 1.5 2.5 3.5 4.5 instantaneous on - state current, i t - (a) instantaneous on - state voltage, v t - (v) min 25 c max 25 c min 125 c max 125 c
semiconductor dcr1020n52 5 / 11 www.dynexsemi.com fig.3 on - state power dissipation C sine wave fig.4 maximu m permissible case temperature, double side cooled C sine wave fig.5 maximum permissible heatsink temperature, double side cooled C sine wave fig.6 on - state power dissipation C rectangular wave 0 2 4 6 8 10 12 14 16 0 1000 2000 3000 mean power dissipation - (kw) mean on - state current, i t(av) - (a) 180 120 90 60 30 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 500 1000 1500 maximum case temperature, t case ( o c ) mean on - state current, i t(av) - (a) 180 120 90 60 30 0 25 50 75 100 125 0 500 1000 1500 maximum heatsink temperature, t heatsink - ( c) mean on - state current, i t(av) - (a) 180 120 90 60 30 0 2 4 6 8 10 12 0 1000 2000 3000 4000 mean power dissipation - (kw) mean on - state current, i t(av) - (a) d.c. 180 120 90 60 30
semiconductor dcr1020n52 6 / 11 w ww.dynexsemi.com fig.7 maximum permissible case temperature, double side cooled C rectangular wave fig.8 maximum permissible heatsink temperature, double side cooled C rectangular wave fig.9 maximum (limit) transient thermal impedance C junction to case (c/kw) 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 55.0 0.001 0.01 0.1 1 10 100 thermal impedance, z th(j - c) ( c/kw ) time ( s ) zth double side cooled zth cathode side cooled zth anode side cooled 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 500 1000 1500 2000 2500 maximum permissible case temperature , t case - ( c) mean on - state current, i t(av) - (a) d.c. 180 120 90 60 30 0 25 50 75 100 125 0 500 1000 1500 2000 2500 maximum heatsink temperature t heatsink - ( o c) mean on - state current, i t(av ) - (a) d.c. 180 120 90 60 30 1 2 3 4 double side cooled r i (c/kw) 3.4733 4.9047 9.1463 4.5220 t i (s) 0.1457 0.0166 1.2832 0.3767 anode side cooled r i (c/kw) 7.6674 5.0530 9.7355 27.5992 t i (s) 0.2241 0.0169 4.0566 8.2780 cathode side cooled r i (c/kw) 6.0393 4.2782 5.1301 25.0874 t i (s) 0.1356 0.0143 0.6594 7.2358 )] / exp( 1 ( [ 4 1 i i i i th t t r z ? ? ? ? ? ? ? r th(j-c) conduction tables show the increments of thermal resistance r th(j-c) when the device operates at conduction angles other than d.c. double side cooling anode side cooling cathode sided cooling ? z th (z) ? z th (z) ? z th (z) ? sine. rect. ? sine. rect. ? sine. rect. 180 3.03 2.07 180 3.03 2.07 180 3.12 2.12 120 3.49 2.95 120 3.49 2.95 120 3.61 3.04 90 3.99 3.43 90 3.99 3.43 90 4.13 3.54 60 4.43 3.94 60 4.43 3.94 60 4.60 4.08 30 4.77 4.49 30 4.76 4.48 30 4.96 4.66 15 4.92 4.77 15 4.92 4.77 15 5.13 4.97 )] / exp( 1 ( [ 4 1 i i i i th t t r z ? ? ? ? ? ? ?
semiconductor dcr1020n52 7 / 11 www.dynexsemi.com fig.10 single - cycle surg e current fig.11 multi - cycle surge current fig.12 stored charge fig.13 reverse recovery current 0 1 2 3 0 5 10 15 20 25 30 35 40 1 10 100 i 2 t (ma 2 s) surge current, i tsm - (ka) pulse width, t p - (ms) i 2 t i tsm conditions: t case = 125 c v r = 0 half - sine wave 1 10 100 1 10 100 surge current, i tsm - (ka) number of cycles conditions: tcase = 125 c v r =0 pulse width = 10ms 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 25 stored charge, q s - (uc) rate of decay of on - state current, di/dt - (a/us) q smax = 2281.45*(di/dt) 0.317 q smin = 1115.64*(di/dt) 0.4219 conditions: t j = 125 c t p = 1ms v r = 100v 0 50 100 150 200 250 300 0 5 10 15 20 25 reverse recovery current, i rr - (a/us) rate of decay of on - state current, di/dt - (a/us) i rrmax = 42.61*(di/dt) 0.6113 i rrmin = 30.51*(di/dt) 0.675 conditions: t j = 125oc t p = 1ms v r = 100v
semiconductor dcr1020n52 8 / 11 w ww.dynexsemi.com fig14 gate characteristics fig. 15 gate characteristics 0 1 2 3 4 5 6 7 8 9 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 gate trigger voltage, v gt - (v) gate trigger current i gt , - (a) tj = 125 o c tj = 25 o c tj = - 40 o c preferred gate drive area upper limit lower limit 0 5 10 15 20 25 30 0 1 2 3 4 5 6 7 8 9 10 gate trigger voltage, v gt - (v) gate trigger current, i gt - (a) lower limit upper limit 5w 10w 20w 50w 100w 150w - 40c
semiconductor dcr1020n52 9 / 11 www.dynexsemi.com package details for further package information, please contact customer servi ces. all dimensions in mm, unless stated otherwise. do not scale. lead length: 420mm lead terminal connector: m4 ring package outline type code: n fig.17 package outline hole ?3.60 x 2.00 electrodes) deep (in both ?73.0 max ?47.0 nom ?47.0 nom ?1.5 gate anode cathode 3rd angle projection if in doubt ask do not scale 20 offset (nom.) to gate tube for package height see table device maximum thickness (mm) minimum thickness (mm) dcr1020n52 34.89 34.34 dcr1110n52 34.89 34.34 dcr1260n42 34.77 34.22 dcr1470n28 34.54 33.99 dcr1530n28 34.54 33.99 dcr1620n22 34.465 33.915 dcr1710n22 34.465 33.915 dcr680n85 35.51 34.96 dcr760n85 35.51 34.96 dcr820n65 35.15 34.6 dcr890n65 35.15 34.6
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